Demand for system-on-chip products, where both analog and digital signal processing are implemented, is increasing. For example, analog circuits capture an analog signal from the surrounding environment and transform the signal into bits, which are then transformed into signals for driving digital circuitry and output functions. Increasingly, it is useful to have both the analog circuitry and digital circuitry in close proximity, for example in the form of digital blocks and analog blocks of circuitry which function together to implement the function of the system, also referred to as mixed mode systems. A concern with the integration of analog and digital blocks is electronic mismatch.
Electronic mismatch of circuitry components may result in reduced signal processing quality. Deviations in processing conditions or the physical stability of component structures in processing and operating environments may contribute to electronic mismatch, for example, a capacitance value of a MIM structure may be inconsistent. The capacitance and response of a MIM capacitor may be affected by several variables. These variables may include processing and operating conditions and may adversely affect the thickness of the capacitive dielectric layer and the resistance of the capacitor plates. The manufacture of stable, low resistance MIM structures has been attempted, in order to reliably provide for the desired capacitances.
Referring to FIG. 1, a known method of forming a MIM capacitor is illustrated. Layer 102 is a silicon nitride (SiN) layer of about 750 Å. Layer 102 is deposited on substrate 100. First tantalum nitride layer 104, of about 200 Å, is deposited on layer 102. Aluminum-copper layer 106, of about 1200 Å, is disposed on first tantalum nitride layer 104, and second tantalum nitride layer 108 of about 600 Å is disposed on aluminum-copper layer 106, thus forming bottom plate 109 of a MIM capacitor. Dielectric layer 110 is disposed on bottom plate 109. Top plate 112, comprised of tantalum nitride (TaN) of about 500 Å, is deposited as the MIM capacitor top plate. Contact to the bottom plate may be made in bottom contact regions 114, and contact to the top plate may be made in top contact region 116.
One disadvantage of the prior art capacitor system is the thickness of the system. It may be difficult to planarize a thick capacitor system. A further disadvantage of the prior art method is the high resistance of the capacitor plates of about 250 μohm-cm. In addition, the process is complex, and may therefore be expensive to manufacture.